commit 9247f4e6573a4d05fe70c3e90dbd53da26e8c5cb Author: Greg Kroah-Hartman Date: Mon Jul 14 15:57:41 2025 +0200 Linux 6.6.98 Signed-off-by: Greg Kroah-Hartman commit 20aa3d5198068ddc6f88e2f7501ecad5add17af5 Author: Borislav Petkov (AMD) Date: Fri Jul 11 21:23:58 2025 +0200 x86/CPU/AMD: Properly check the TSA microcode In order to simplify backports, I resorted to an older version of the microcode revision checking which didn't pull in the whole struct x86_cpu_id matching machinery. My simpler method, however, forgot to add the extended CPU model to the patch revision, which lead to mismatches when determining whether TSA mitigation support is present. So add that forgotten extended model. This is a stable-only fix and the preference is to do it this way because it is a lot simpler. Also, the Fixes: tag below points to the respective stable patch. Fixes: 90293047df18 ("x86/bugs: Add a Transient Scheduler Attacks mitigation") Reported-by: Thomas Voegtle Signed-off-by: Borislav Petkov (AMD) Tested-by: Thomas Voegtle Message-ID: <04ea0a8e-edb0-c59e-ce21-5f3d5d167af3@lio96.de> Signed-off-by: Greg Kroah-Hartman